65 search results - page 8 / 13 » Evaluating register file size in ASIP design |
WSC
2000
14 years 10 months ago
2000
As part of the design of the next generation Naval Amphibious Transport Dock Ship (LPD17), simulation was used to evaluate the arrangement and flow of cargo on the ship and to int...
108
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ASPLOS
2004
ACM
15 years 2 months ago
2004
ACM
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
MICRO
1998
IEEE
15 years 1 months ago
1998
IEEE
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
HPCA
1997
IEEE
15 years 1 months ago
1997
IEEE
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
JCM
2006
14 years 9 months ago
2006
In this paper, we propose and analyze a multicast application called SOMA (SynchrOnous Multicast Application) which offers multicast file transfer service in an asymmetric intra-ca...