668 search results - page 103 / 134 » Evaluation of Parallel Logic Simulation Using DVSIM |
134
Voted
IPPS
1998
IEEE
15 years 7 months ago
1998
IEEE
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
124
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IPPS
1998
IEEE
15 years 7 months ago
1998
IEEE
In this paper we extend a previously introduced method for optimizing the arbitration policy employed by ServerNet routers and we evaluate the method's effect on scalability....
137
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ICDCS
1997
IEEE
15 years 7 months ago
1997
IEEE
—The increasing deployment of wireless access technology, along with the emergence of high speed integrated service networks, such as ATM, promises to provide mobile users with u...
112
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IPPS
1997
IEEE
15 years 7 months ago
1997
IEEE
Abstract — Processor scheduling has received considerable attention in the context of shared-memory multiprocessor systems but has not received as much attention in distributed-m...
121
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ICS
2000
Tsinghua U.
15 years 6 months ago
2000
Tsinghua U.
Scheduling of processes onto processors of a parallel machine has always been an important and challenging area of research. The issue becomes even more crucial and di cult as we ...