668 search results - page 24 / 134 » Evaluation of Parallel Logic Simulation Using DVSIM |
DAC
2002
ACM
16 years 21 days ago
2002
ACM
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
108
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FUZZY
2001
Springer
15 years 4 months ago
2001
Springer
Simulated annealing is a general optimisation algorithm, based on hill-climbing. As in hill-climbing, new candidate solutions are selected from the ‘neighbourhood’ of the curre...
147
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HPCA
2002
IEEE
16 years 2 days ago
2002
IEEE
Power dissipation has become one of the most critical factors for the continued development of both high-end and low-end computer systems. The successful design and evaluation of ...
ESA
2009
Springer
15 years 6 months ago
2009
Springer
Abstract. We consider the multivariate interlace polynomial introduced by Courcelle (2008), which generalizes several interlace polynomials defined by Arratia, Bollob´as, and Sor...
107
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PDPTA
2000
15 years 1 months ago
2000
Exploiting compile time knowledge to improve memory bandwidth can produce noticeable improvements at run-time [13, 1]. Allocating the data structure [13] to separate memories when...