668 search results - page 38 / 134 » Evaluation of Parallel Logic Simulation Using DVSIM |
129
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DSD
2002
IEEE
15 years 8 months ago
2002
IEEE
Modern microprocessors schedule instructions dynamically in order to exploit instruction-level parallelism. It is necessary to increase instruction window size for improving instr...
127
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COORDINATION
2006
Springer
15 years 7 months ago
2006
Springer
How to coordinate the processes in a complex component-based software system is a nontrivial issue. Many different coordination approaches exist, each with its own specific advanta...
119
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HPCA
2003
IEEE
16 years 3 months ago
2003
IEEE
Due to cost, time, and flexibility constraints, simulators are often used to explore the design space when developing a new processor architecture, as well as when evaluating the ...
121
Voted
HPCA
2005
IEEE
16 years 3 months ago
2005
IEEE
Due to the simulation time of the reference input set, architects often use alternative simulation techniques. Although these alternatives reduce the simulation time, what has not...
126
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HPCA
2003
IEEE
16 years 3 months ago
2003
IEEE
Multi-threaded commercial workloads implement many important internet services. Consequently, these workloads are increasingly used to evaluate the performance of uniprocessor and...