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» Evaluation of Parallel Logic Simulation Using DVSIM
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ISCA
1996
IEEE
103views Hardware» more  ISCA 1996»
15 years 7 months ago
Evaluation of Design Alternatives for a Multiprocessor Microprocessor
In the future, advanced integrated circuit processing and packaging technology will allow for several design options for multiprocessor microprocessors. In this paper we consider ...
Basem A. Nayfeh, Lance Hammond, Kunle Olukotun
IPPS
2003
IEEE
15 years 8 months ago
So Many States, So Little Time: Verifying Memory Coherence in the Cray X1
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
Dennis Abts, Steve Scott, David J. Lilja
146
Voted
GPC
2008
Springer
15 years 4 months ago
Using Moldability to Improve Scheduling Performance of Parallel Jobs on Computational Grid
In a computational grid environment, a common practice is try to allocate an entire parallel job onto a single participating site. Sometimes a parallel job, upon its submission, ca...
Kuo-Chan Huang, Po-Chi Shih, Yeh-Ching Chung
TMC
2012
13 years 5 months ago
Modeling and Performance Evaluation of Backoff Misbehaving Nodes in CSMA/CA Networks
—Backoff misbehavior, in which a wireless node deliberately manipulates its backoff time, can induce significant network problems, such as severe unfairness and denial-of-servic...
Zhuo Lu, Wenye Wang, Cliff Wang
CNHPCA
2009
Springer
15 years 6 months ago
Parallel Branch Prediction on GPU Platform
Abstract. Branch Prediction is a common function in nowadays microprocessor. Branch predictor is duplicated into multiple copies in each core of a multicore and many-core processor...
Liqiang He, Guangyong Zhang