668 search results - page 45 / 134 » Evaluation of Parallel Logic Simulation Using DVSIM |
128
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TCAD
2002
15 years 2 months ago
2002
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
ATS
1998
IEEE
15 years 7 months ago
1998
IEEE
This paper presents the design and simulation method for developing a RISC-based 32-bit embedded on-board computer. Instead of the conventional breadboarded prototype, (1) we used...
98
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WSC
2004
15 years 4 months ago
2004
Developing a sequential simulation program is not an easy task. Developing a distributed simulation program is harder than a sequential one because it is necessary to deal with ma...
132
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FPGA
2003
ACM
15 years 8 months ago
2003
ACM
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
130
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CCGRID
2003
IEEE
15 years 8 months ago
2003
IEEE
— Since the advent of distributed computer systems an active field of research has been the investigation of scheduling strategies for parallel applications. The common approach...