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» Evaluation of Parallel Logic Simulation Using DVSIM
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IPPS
1998
IEEE
15 years 7 months ago
Optimistic Synchronization of Mixed-Mode Simulators
Mixed-Mode simulation has been generating considerable interest in the simulation community and has continued to grow as an active research area. Traditional mixed-mode simulation...
Peter Frey, Radharamanan Radhakrishnan
ICDCS
2008
IEEE
15 years 9 months ago
Securing Wireless Data Networks against Eavesdropping using Smart Antennas
In this paper, we focus on securing communication over wireless data networks from malicious eavesdroppers, using smart antennas. While conventional cryptography based approaches ...
Sriram Lakshmanan, Cheng-Lin Tsao, Raghupathy Siva...
IPPS
1999
IEEE
15 years 7 months ago
NWCache: Optimizing Disk Accesses via an Optical Network/Write Cache Hybrid
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...
Enrique V. Carrera, Ricardo Bianchini
HPDC
2002
IEEE
15 years 8 months ago
Distributed Job Scheduling on Computational Grids Using Multiple Simultaneous Requests
Even though middleware support for grid computing has been the subject of extensive research, scheduling policies for the grid context have not been much studied. In addition to p...
Vijay Subramani, Rajkumar Kettimuthu, Srividya Sri...
PACS
2004
Springer
115views Hardware» more  PACS 2004»
15 years 8 months ago
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization
Dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay ...
Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, ...