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» Evaluation of Parallel Logic Simulation Using DVSIM
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DAC
2004
ACM
15 years 7 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
IPPS
2006
IEEE
15 years 9 months ago
An overview of the Jahob analysis system: project goals and current status
We present an overview of the Jahob system for modular analysis of data structure properties. Jahob uses a subset of Java as the implementation language and annotations with formu...
Viktor Kuncak, Martin C. Rinard
ASPLOS
2010
ACM
15 years 10 months ago
ParaLog: enabling and accelerating online parallel monitoring of multithreaded applications
Instruction-grain lifeguards monitor the events of a running application at the level of individual instructions in order to identify and help mitigate application bugs and securi...
Evangelos Vlachos, Michelle L. Goodstein, Michael ...
PPAM
2005
Springer
15 years 8 months ago
A Web Computing Environment for Parallel Algorithms in Java
We present a web computing library (PUBWCL) in Java that allows to execute tightly coupled, massively parallel algorithms in the bulk-synchronous (BSP) style on PCs distributed ove...
Olaf Bonorden, Joachim Gehweiler, Friedhelm Meyer ...
BC
2004
91views more  BC 2004»
15 years 3 months ago
Simulation and parameter estimation of dynamics of synaptic depression
Abstract. Synaptic release was simulated using a Simulink sequential storage model with three vesicular pools. Modeling was modular and easily extendable to the systems with greate...
F. Aristizabal, M. I. Glavinovic