Sciweavers

60 search results - page 11 / 12
» Evaluation of Stream Virtual Machine on Raw Processor
Sort
View
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
15 years 2 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
108
Voted
ICPADS
2010
IEEE
14 years 7 months ago
Data-Aware Task Scheduling on Multi-accelerator Based Platforms
To fully tap into the potential of heterogeneous machines composed of multicore processors and multiple accelerators, simple offloading approaches in which the main trunk of the ap...
Cédric Augonnet, Jérôme Clet-O...
AUSAI
2010
Springer
14 years 8 months ago
Tuning Java to Run Interactive Multiagent Simulations over Jason
Java-based simulation environments are currently used by many multiagent systems (MAS), since they mainly provide portability as well as an interesting reduction of the development...
Víctor Fernández-Bauset, Francisco G...
SIGCOMM
2009
ACM
15 years 4 months ago
PortLand: a scalable fault-tolerant layer 2 data center network fabric
This paper considers the requirements for a scalable, easily manageable, fault-tolerant, and efficient data center network fabric. Trends in multi-core processors, end-host virtua...
Radhika Niranjan Mysore, Andreas Pamboris, Nathan ...
OOPSLA
2009
Springer
15 years 4 months ago
A concurrent dynamic analysis framework for multicore hardware
Software has spent the bounty of Moore’s law by solving harder problems and exploiting abstractions, such as highlevel languages, virtual machine technology, binary rewritdynami...
Jungwoo Ha, Matthew Arnold, Stephen M. Blackburn, ...