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DATE
2010
IEEE
142views Hardware» more  DATE 2010»
15 years 4 months ago
A modeling method by eliminating execution traces for performance evaluation
—This paper describes a system-level modeling method in UML for performance evaluation of embedded systems. The core technology of this modeling method is reverse modeling based ...
Kouichi Ono, Manabu Toyota, Ryo Kawahara, Yoshifum...
FPL
1997
Springer
130views Hardware» more  FPL 1997»
15 years 3 months ago
Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research
: The paper first proposes requirements for an ideal platform for codesign research. A new board developed at Imperial College, the Riley-2, is shown to meet these requirements. It...
Patrick I. Mackinlay, Peter Y. K. Cheung, Wayne Lu...
DATE
2004
IEEE
151views Hardware» more  DATE 2004»
15 years 3 months ago
Dynamic Voltage and Cache Reconfiguration for Low Power
Given a set of real-time tasks scheduled using the earliest deadline first (EDF) algorithm, we discuss two techniques for reducing power consumption while meeting all timing requi...
André C. Nácul, Tony Givargis
DATE
2007
IEEE
108views Hardware» more  DATE 2007»
15 years 6 months ago
Evaluation of design for reliability techniques in embedded flash memories
Non-volatile Flash memories are becoming more and more popular in Systems-on-Chip (SoC). Embedded Flash (eFlash) memories are based on the well-known floatinggate transistor conce...
Benoît Godard, Jean Michel Daga, Lionel Torr...
EMSOFT
2007
Springer
15 years 6 months ago
Methods for multi-dimensional robustness optimization in complex embedded systems
Design space exploration of embedded systems typically focuses on classical design goals such as cost, timing, buffer sizes, and power consumption. Robustness criteria, i.e. sensi...
Arne Hamann, Razvan Racu, Rolf Ernst