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IEEEPACT
2005
IEEE
15 years 5 months ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
FCCM
2002
IEEE
126views VLSI» more  FCCM 2002»
15 years 4 months ago
Hyperspectral Image Compression on Reconfigurable Platforms
NASA’s satellites currently do not make use of advanced image compression techniques during data transmission to earth because of limitations in the available platforms. With th...
Thomas W. Fry, Scott Hauck
VIS
2004
IEEE
164views Visualization» more  VIS 2004»
16 years 28 days ago
Real-Time Motion Estimation and Visualization on Graphics Cards
We present a tool for real-time visualization of motion features in 2D image sequences. The motion is estimated through an eigenvector analysis of the spatiotemporal structure ten...
Christoph S. Garbe, Robert Strzodka
ISCAS
2007
IEEE
114views Hardware» more  ISCAS 2007»
15 years 6 months ago
On the Compensation of Magnitude Response Mismatches in M-channel Time-interleaved ADCs
Abstract— Parallel time-interleaved analog-to-digital converters (TIADCs) are an attractive architecture to realize low-power and high-speed data conversion. As a drawback of suc...
Stefan Mendel, Christian Vogel
ICPADS
1998
IEEE
15 years 4 months ago
A Dualthreaded Java Processor for Java Multithreading
Java-Web Computing paradigm changed Internet into computing environment. For Java-Web Computing and many Java applications, a new Java processor, called simultaneous multithreaded...
Chun-Mok Chung, Shin-Dug Kim