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IPPS
2010
IEEE
14 years 9 months ago
A lock-free, cache-efficient multi-core synchronization mechanism for line-rate network traffic monitoring
Line-rate data traffic monitoring in high-speed networks is essential for network management. To satisfy the line-rate requirement, one can leverage multi-core architectures to par...
Patrick P. C. Lee, Tian Bu, Girish P. Chandranmeno...
VLDB
2005
ACM
109views Database» more  VLDB 2005»
16 years 5 hour ago
Model-based approximate querying in sensor networks
Abstract Declarative queries are proving to be an attractive paradigm for interacting with networks of wireless sensors. The metaphor that "the sensornet is a database" i...
Amol Deshpande, Carlos Guestrin, Samuel Madden, Jo...
ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
15 years 6 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
CODES
2004
IEEE
15 years 3 months ago
Operation tables for scheduling in the presence of incomplete bypassing
Register bypassing is a powerful and widely used feature in modern processors to eliminate certain data hazards. Although complete bypassing is ideal for performance, bypassing ha...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
TISSEC
2010
119views more  TISSEC 2010»
14 years 6 months ago
Storage-Based Intrusion Detection
Storage-based intrusion detection allows storage systems to transparently watch for suspicious activity. Storage systems are well-positioned to spot several common intruder action...
Adam G. Pennington, John Linwood Griffin, John S. ...