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DATE
2008
IEEE
114views Hardware» more  DATE 2008»
15 years 7 months ago
Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors
—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-...
Sanghyun Park, Aviral Shrivastava, Yunheung Paek
CVPR
2010
IEEE
15 years 9 months ago
Figure-Ground Segmentation Improves Handled Object Recognition in Egocentric Video
Identifying handled objects, i.e. objects being manipulated by a user, is essential for recognizing the person’s activities. An egocentric camera as worn on the body enjoys many...
Xiaofeng Ren, Chunhui Gu
MICRO
2005
IEEE
107views Hardware» more  MICRO 2005»
15 years 7 months ago
Stream Programming on General-Purpose Processors
— In this paper we investigate mapping stream programs (i.e., programs written in a streaming style for streaming architectures such as Imagine and Raw) onto a general-purpose CP...
Jayanth Gummaraju, Mendel Rosenblum
IPPS
2010
IEEE
14 years 11 months ago
MMT: Exploiting fine-grained parallelism in dynamic memory management
Dynamic memory management is one of the most expensive but ubiquitous operations in many C/C++ applications. Additional features such as security checks, while desirable, further w...
Devesh Tiwari, Sanghoon Lee, James Tuck, Yan Solih...
DAC
2007
ACM
16 years 2 months ago
Program Mapping onto Network Processors by Recursive Bipartitioning and Refining
Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
Jia Yu, Jingnan Yao, Jun Yang 0002, Laxmi N. Bhuya...