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DAC
1998
ACM
16 years 22 days ago
Combining Theorem Proving and Trajectory Evaluation in an Industrial Environment
We describe the verification of the IM: a large, complex (12,000 gates and 1100 latches) circuit that detects and marks the boundaries between Intel architecture (IA-32) instructi...
Mark Aagaard, Robert B. Jones, Carl-Johan H. Seger
ANCS
2009
ACM
14 years 9 months ago
A lock-free, cache-efficient shared ring buffer for multi-core architectures
We propose MCRingBuffer, a lock-free, cache-efficient shared ring buffer that provides fast data accesses among threads running in multi-core architectures. MCRingBuffer seeks to ...
Patrick P. C. Lee, Tian Bu, Girish P. Chandranmeno...
IPPS
1997
IEEE
15 years 4 months ago
Empirical Evaluation of Distributed Mutual Exclusion Algorithms
In this paper, we evaluated various distributed mutual exclusion algorithms on the IBM SP2 machine and the Intel iPSC/860 system. The empirical results are compared in terms of su...
Shiwa S. Fu, Nian-Feng Tzeng, Zhiyuan Li
DAC
2008
ACM
16 years 23 days ago
Optimizing automatic abstraction refinement for generalized symbolic trajectory evaluation
ng Automatic Abstraction Refinement for Generalized Symbolic Trajectory Evaluation Yan Chen Dept. of Computer Science Portland State University Portland, OR, 97207 chenyan@cs.pdx.e...
Yan Chen, Fei Xie, Jin Yang
ICCD
2000
IEEE
159views Hardware» more  ICCD 2000»
15 years 4 months ago
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...
Deependra Talla, Lizy Kurian John, Viktor S. Lapin...