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HPCA
2008
IEEE
15 years 10 months ago
Performance and power optimization through data compression in Network-on-Chip architectures
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicop...
HPCA
2003
IEEE
15 years 10 months ago
Dynamic Optimization of Micro-Operations
Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one o...
Brian Slechta, David Crowe, Brian Fahs, Michael Fe...
EDBT
2008
ACM
159views Database» more  EDBT 2008»
15 years 10 months ago
Deleting index entries from compliance storage
In response to regulatory focus on secure retention of electronic records, businesses are using magnetic disks configured as write-once read-many (WORM) compliance storage devices...
Soumyadeb Mitra, Marianne Winslett, Nikita Borisov
MOBIHOC
2006
ACM
15 years 9 months ago
Balancing distance and lifetime in delay constrained ad hoc networks
This paper addresses the problem of optimizing the packet transmission schedule in an ad hoc network with end-toend delay constraints. The emphasis is to determine the proper rela...
Ben Liang, Min Dong
MOBIHOC
2002
ACM
15 years 9 months ago
Weak duplicate address detection in mobile ad hoc networks
Auto-configuration is a desirable goal in implementing mobile ad hoc networks. Specifically, automated dynamic assignment (without manual intervention) of IP addresses is desirabl...
Nitin H. Vaidya