166 search results - page 21 / 34 » Event Spaces and their Linear Logic |
CONSTRAINTS
2007
14 years 9 months ago
2007
In the ECAD area, the Test Generation (TG) problem consists in finding an input vector test for some possible diagnosis (a set of faults) of a digital circuit. Such tests may have ...
ICALP
2009
Springer
15 years 9 months ago
2009
Springer
We present the first uniquely represented data structure for an external memory model of computation, a B-tree analogue called a B-treap. Uniquely represented data structures repre...
SDM
2007
SIAM
14 years 11 months ago
2007
SIAM
We consider the supervised learning of a binary classifier from noisy observations. We use smooth boosting to linearly combine abstaining hypotheses, each of which maps a subcube...
TCAD
1998
14 years 9 months ago
1998
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
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TII
2010
14 years 4 months ago
2010
In this paper, we develop an automated framework for formal verification of timed continuous Petri nets (ContPNs). Specifically, we consider two problems: (1) given an initial set ...