Sciweavers

13631 search results - page 313 / 2727
» Event-Based Performance Analysis
Sort
View
TKDE
2002
166views more  TKDE 2002»
15 years 3 months ago
A Comprehensive Analytical Performance Model for Disk Devices under Random Workloads
Our goal with this paper is to contribute a common theoretical framework for studying the performance of disk-storage devices. Understanding the performance behavior of these devi...
Peter Triantafillou, Stavros Christodoulakis, Cost...
ICCAD
2007
IEEE
111views Hardware» more  ICCAD 2007»
16 years 1 months ago
Exploiting STI stress for performance
— Starting at the 65nm node, stress engineering to improve performance of transistors has been a major industry focus. An intrinsic stress source – shallow trench isolation –...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
IPCCC
2007
IEEE
15 years 10 months ago
Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study
As Chip Multiprocessor (CMP) has become the mainstream in processor architectures, Intel and AMD have introduced their dual-core processors to the PC market. In this paper, perfor...
Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-K...
CODES
2009
IEEE
15 years 9 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
RE
2008
Springer
15 years 3 months ago
Examining the Relationships between Performance Requirements and "Not a Problem" Defect Reports
Missing or imprecise requirements can lead stakeholders to make incorrect assumptions. A "Not a Problem" defect report (NaP) describes a software behavior that a stakeho...
Chih-Wei Ho, Laurie Williams, Brian Robinson