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» Evolutionary Approach to Test Generation for Functional BIST
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ATS
1998
IEEE
91views Hardware» more  ATS 1998»
15 years 1 months ago
Special ATPG to Correlate Test Patterns for Low-Overhead Mixed-Mode BIST
In mixed-mode BIST, deterministic test patterns are generated with on-chip hardware to detect the random-pattern-resistant (r.p.r.) faults that are missed by the pseudo-random pat...
Madhavi Karkala, Nur A. Touba, Hans-Joachim Wunder...
ETS
2006
IEEE
100views Hardware» more  ETS 2006»
15 years 3 months ago
Optimized Signature-Based Statistical Alternate Test for Mixed-Signal Performance Parameters
— Accurate generation of circuit specifications from test signatures is a difficult problem, since analytical expressions cannot precisely describe the nonlinear relationships ...
Byoungho Kim, Hongjoong Shin, Ji Hwan (Paul) Chun,...
ITC
1995
IEEE
104views Hardware» more  ITC 1995»
15 years 1 months ago
Synthesis of Mapping Logic for Generating Transformed Pseudo-Random Patterns for BIST
During built-in self-test (BIST), the set of patterns generated by a pseudo-random pattern generator may not provide a sufficiently high fault coverage. This paper presents a new ...
Nur A. Touba, Edward J. McCluskey
ITC
2000
IEEE
91views Hardware» more  ITC 2000»
15 years 1 months ago
A mixed mode BIST scheme based on reseeding of folding counters
In this paper a new scheme for deterministic and mixed mode scan-based BIST is presented. It relies on a new type of test pattern generator which resembles a programmable Johnson ...
Sybille Hellebrand, Hans-Joachim Wunderlich, Huagu...
ICST
2010
IEEE
14 years 8 months ago
TestFul: An Evolutionary Test Approach for Java
Abstract—This paper presents TestFul, an evolutionary testing approach for Java classes that works both at class and method level. TestFul exploits a multi-objective evolutionary...
Luciano Baresi, Pier Luca Lanzi, Matteo Miraz