3198 search results - page 316 / 640 » Evolutionary Computation in Structural Design |
136
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DAC
2003
ACM
15 years 11 months ago
2003
ACM
Conventional register transfer level (RTL) debugging is based on overlaying simulation results on structural connectivity information of the Hardware Description Language (HDL) so...
183
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ISSS
1999
IEEE
15 years 10 months ago
1999
IEEE
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
171
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FPGA
2006
ACM
15 years 10 months ago
2006
ACM
The paper presents several improvements to state-of-theart in FPGA technology mapping exemplified by a recent advanced technology mapper DAOmap [Chen and Cong, ICCAD `04]. Improve...
228
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ACMIDC
2010
15 years 4 months ago
2010
Children with autism often experience substantial challenges in understanding, structuring, and predicting the activities in their daily lives. The use of symbols to represent a s...
160
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Extensive software-based simulation continues to be the mainstream methodology for functional verification of designs. To optimize the use of limited simulation resources, coverag...