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» Evolutionary algorithms and dynamic programming
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CGO
2005
IEEE
15 years 10 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
ISLPED
2004
ACM
151views Hardware» more  ISLPED 2004»
15 years 9 months ago
Dynamic voltage and frequency scaling based on workload decomposition
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
HIPC
2009
Springer
15 years 2 months ago
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Ga...
ECRTS
2010
IEEE
15 years 5 months ago
Minimizing Multi-resource Energy for Real-Time Systems with Discrete Operation Modes
Energy conservation is an important issue in the design of embedded systems. Dynamic Voltage Scaling (DVS) and Dynamic Power Management (DPM) are two widely used techniques for sav...
Fanxin Kong, Yiqun Wang, Qingxu Deng, Wang Yi
CVPR
2006
IEEE
16 years 6 months ago
Improving Border Localization of Multi-Baseline Stereo Using Border-Cut
This paper presents a novel algorithm that improves the localization of disparity discontinuities of disparity maps obtained by multi-baseline stereo. Rather than associating a di...
Marc-Antoine Drouin, Martin Trudeau, Sébast...