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119
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ICES
2010
Springer
106views Hardware» more  ICES 2010»
15 years 1 months ago
The Use of Genetic Algorithm to Reduce Power Consumption during Test Application
Abstract. In this paper it is demonstrated how two issues from the area of testing electronic components can be merged and solved by means of a genetic algorithm. The two issues ar...
Jaroslav Skarvada, Zdenek Kotásek, Josef St...
157
Voted
FLAIRS
2009
15 years 1 months ago
Advanced Measures for Empirical Testing
Empirical testing is a very popular evaluation method for the development of intelligent systems. Here, previously solved problems with correct solutions are given as cases to the...
Joachim Baumeister
121
Voted
APSEC
2010
IEEE
14 years 10 months ago
Testing Inter-layer and Inter-task Interactions in RTES Applications
Abstract--Real-time embedded systems (RTESs) are becoming increasingly ubiquitous, controlling a wide variety of popular and safety-critical devices. Effective testing techniques c...
Ahyoung Sung, Witawas Srisa-an, Gregg Rothermel, T...
STOC
2003
ACM
114views Algorithms» more  STOC 2003»
16 years 3 months ago
Testing subgraphs in directed graphs
Let H be a fixed directed graph on h vertices, let G be a directed graph on n vertices and suppose that at least n2 edges have to be deleted from it to make it H-free. We show tha...
Noga Alon, Asaf Shapira
124
Voted
VLSID
2002
IEEE
97views VLSI» more  VLSID 2002»
16 years 4 months ago
Multiple Faults: Modeling, Simulation and Test
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
Yong Chang Kim, Vishwani D. Agrawal, Kewal K. Salu...