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» Examples of Models of the Asynchronous Circuits
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ISCAS
2003
IEEE
131views Hardware» more  ISCAS 2003»
15 years 3 months ago
Process variation dimension reduction based on SVD
We propose an algorithm based on singular value decomposition (SVD) to reduce the number of process variation variables. With few process variation variables, fault simulation and...
Zhuo Li, Xiang Lu, Weiping Shi
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
15 years 1 months ago
Power analysis and low-power scheduling techniques for embedded DSP software
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, M...
GLVLSI
2005
IEEE
99views VLSI» more  GLVLSI 2005»
15 years 3 months ago
An empirical study of crosstalk in VDSM technologies
We perform a detailed study of various crosstalk scenarios in VDSM technologies by using a distributed model of the crosstalk site and make a number of key observations about the ...
Shahin Nazarian, Massoud Pedram, Emre Tuncer
ICCAD
1994
IEEE
144views Hardware» more  ICCAD 1994»
15 years 1 months ago
Power analysis of embedded software: a first step towards software power minimization
Embedded computer systems are characterized by the presence of a dedicated processor and the software that runs on it. Power constraints are increasingly becoming the critical com...
Vivek Tiwari, Sharad Malik, Andrew Wolfe
101
Voted
ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
15 years 1 months ago
Automated refinement checking of concurrent systems
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta