163 search results - page 25 / 33 » Executable HybridUML and Its Application to Train Control Sy... |
CODES
2008
IEEE
15 years 6 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
RSP
2003
IEEE
15 years 5 months ago
2003
IEEE
The paper shows the outlines of the SLAM system and how its design is suitable for automating rapid prototyping. The system includes a very expressive object oriented specificati...
RTSS
2005
IEEE
15 years 5 months ago
2005
IEEE
Static timing analysis safely bounds worst-case execution times to determine if tasks can meet their deadlines in hard real-time systems. However, conventional timing analysis req...
108
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PPOPP
2010
ACM
15 years 9 months ago
2010
ACM
We present Lazy Binary Splitting (LBS), a user-level scheduler of nested parallelism for shared-memory multiprocessors that builds on existing Eager Binary Splitting work-stealing...
126
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CODES
2005
IEEE
15 years 5 months ago
2005
IEEE
The growing number of information security breaches in electronic and computing systems calls for new design paradigms that consider security as a primary design objective. This i...