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LCTRTS
2010
Springer
15 years 4 months ago
Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
Ines Viskic, Lochi Lo Chi Yu Lo, Daniel Gajski
DATE
2009
IEEE
137views Hardware» more  DATE 2009»
15 years 4 months ago
Adaptive prefetching for shared cache based chip multiprocessors
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
Mahmut T. Kandemir, Yuanrui Zhang, Ozcan Ozturk
WEA
2004
Springer
150views Algorithms» more  WEA 2004»
15 years 3 months ago
Increased Bit-Parallelism for Approximate String Matching
Abstract. Bit-parallelism permits executing several operations simultaneously over a set of bits or numbers stored in a single computer word. This technique permits searching for t...
Heikki Hyyrö, Kimmo Fredriksson, Gonzalo Nava...
FOSSACS
2001
Springer
15 years 2 months ago
On Regular Message Sequence Chart Languages and Relationships to Mazurkiewicz Trace Theory
Hierarchical Message Sequence Charts are a well-established formalism to specify telecommunication protocols. In this model, numerous undecidability results were obtained recently ...
Rémi Morin
AGTIVE
1999
Springer
15 years 2 months ago
Support for Design Patterns Through Graph Transformation Tools
A suitable software architecture –for example in the area of distributed application– can be composed of known-to-work solutions. These are also known as design patterns. Howev...
Ansgar Radermacher