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DAC
2006
ACM
15 years 11 months ago
Programming models and HW-SW interfaces abstraction for multi-processor SoC
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...
Ahmed Amine Jerraya, Aimen Bouchhima, Fréd&...
ISCA
2009
IEEE
137views Hardware» more  ISCA 2009»
15 years 4 months ago
A case for an interleaving constrained shared-memory multi-processor
Shared-memory multi-threaded programming is inherently more difficult than single-threaded programming. The main source of complexity is that, the threads of an application can in...
Jie Yu, Satish Narayanasamy
89
Voted
IIE
2007
159views more  IIE 2007»
14 years 10 months ago
Creating and Visualizing Test Data from Programming Exercises
Automatic assessment of programming exercises is typically based on testing approach. Most automatic assessment frameworks execute tests and evaluate test results automatically, bu...
Petri Ihantola
ITC
2003
IEEE
149views Hardware» more  ITC 2003»
15 years 3 months ago
BIST for Xilinx 4000 and Spartan Series FPGAs: A Case Study
Abstract: We discuss the development of Built-In SelfTest (BIST) configurations that test all of the programmable logic and interconnect resources in the core of Xilinx 4000E, 4000...
Charles E. Stroud, Keshia N. Leach, Thomas A. Slau...
ICCS
2005
Springer
15 years 3 months ago
Model-Based Statistical Testing of a Cluster Utility
Abstract. As High Performance Computing becomes more collaborative, software certification practices are needed to quantify the credibility of shared applications. To demonstrate q...
W. Thomas Swain, Stephen L. Scott