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ISCA
2010
IEEE
176views Hardware» more  ISCA 2010»
15 years 4 months ago
Forwardflow: a scalable core for power-constrained CMPs
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased coreper-socket c...
Dan Gibson, David A. Wood
DATE
2006
IEEE
157views Hardware» more  DATE 2006»
15 years 5 months ago
Modeling and simulation of mobile gateways interacting with wireless sensor networks
Sensor networks are emerging wireless technologies; their integration with the existing 2.5G, 3G mobile networks is a key issue to provide advanced services, e.g., health control....
Franco Fummi, Davide Quaglia, Fabio Ricciato, Maur...
FPL
2008
Springer
109views Hardware» more  FPL 2008»
15 years 1 months ago
Loop unrolling and shifting for reconfigurable architectures
Loops are an important source of optimization. In this paper, we propose an extension to our work on loop unrolling and loop shifting for reconfigurable architectures. By applying...
Ozana Silvia Dragomir, Todor Stefanov, Koen Bertel...
EUROSYS
2006
ACM
15 years 9 months ago
Practical taint-based protection using demand emulation
Many software attacks are based on injecting malicious code into a target host. This paper demonstrates the use of a wellknown technique, data tainting, to track data received fro...
Alex Ho, Michael A. Fetterman, Christopher Clark, ...
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 3 months ago
MultiNoC: A Multiprocessing System Enabled by a Network on Chip
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
Aline Mello, Leandro Möller, Ney Calazans, Fe...