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SASP
2009
IEEE
222views Hardware» more  SASP 2009»
15 years 6 months ago
Arithmetic optimization for custom instruction set synthesis
Abstract—One of the ways that custom instruction set extensions can improve over software execution is through the use of hardware structures that have been optimized at the arit...
Ajay K. Verma, Yi Zhu, Philip Brisk, Paolo Ienne
MIDDLEWARE
2005
Springer
15 years 5 months ago
Middleware for protocol-based coordination in dynamic networks
Pervasive and ad hoc computing applications are frequently deployed in dynamic networks. Due to mobility of the computing nodes, their unreliability, or a limited communication ra...
Kurt Schelfthout, Danny Weyns, Tom Holvoet
FPL
2009
Springer
79views Hardware» more  FPL 2009»
15 years 4 months ago
A reconfigurable architecture for the Phylogenetic Likelihood Function
As FPGA devices become larger, more coarse-grain modules coupled with large scale reconfigurable fabric become available, thus enabling new classes of applications to run effici...
Nikolaos Alachiotis, Alexandros Stamatakis, Euripi...
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DCOSS
2008
Springer
15 years 1 months ago
Decoding Code on a Sensor Node
Abstract. Wireless sensor networks come of age and start moving out of the laboratory into the field. As the number of deployments is increasing the need for an efficient and relia...
Pascal von Rickenbach, Roger Wattenhofer
RAID
2009
Springer
15 years 6 months ago
Multi-byte Regular Expression Matching with Speculation
Intrusion prevention systems determine whether incoming traffic matches a database of signatures, where each signature in the database represents an attack or a vulnerability. IPSs...
Daniel Luchaup, Randy Smith, Cristian Estan, Somes...