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ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
15 years 3 months ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
TVLSI
2008
112views more  TVLSI 2008»
14 years 10 months ago
System Architecture and Implementation of MIMO Sphere Decoders on FPGA
Multiple-input
Xin-Ming Huang, Cao Liang, Jing Ma
FCCM
2000
IEEE
122views VLSI» more  FCCM 2000»
15 years 2 months ago
Evaluating Hardware Compilation Techniques
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
Markus Weinhardt, Wayne Luk
TJS
2002
160views more  TJS 2002»
14 years 9 months ago
Adaptive Optimizing Compilers for the 21st Century
Historically, compilers have operated by applying a fixed set of optimizations in a predetermined order. We call such an ordered list of optimizations a compilation sequence. This...
Keith D. Cooper, Devika Subramanian, Linda Torczon
LCPC
2001
Springer
15 years 2 months ago
Probabilistic Points-to Analysis
Information gathered by the existing pointer analysis techniques can be classified as must aliases or definitely-points-to relationships, which hold for all executions, and may a...
Yuan-Shin Hwang, Peng-Sheng Chen, Jenq Kuen Lee, R...