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CDES
2008
90views Hardware» more  CDES 2008»
14 years 11 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
GTTSE
2007
Springer
15 years 4 months ago
Model Transformations for the Compilation of Multi-processor Systems-on-Chip
With the increase of amount of transistors which can be contained on a chip and the constant expectation for more sophisticated applications, the design of Systems-on-Chip (SoC) is...
Éric Piel, Philippe Marquet, Jean-Luc Dekey...
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 3 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah
85
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CGO
2009
IEEE
15 years 4 months ago
Stream Compilation for Real-Time Embedded Multicore Systems
Abstract—Multicore systems have not only become ubiquitous in the desktop and server worlds, but are also becoming the standard in the embedded space. Multicore offers programabi...
Yoonseo Choi, Yuan Lin, Nathan Chong, Scott A. Mah...
ISORC
2009
IEEE
15 years 4 months ago
Embedded JIT Compilation with CACAO on YARI
Java is one of the most popular programming languages for the development of portable workstation and server applications available today. Because of its clean design and typesafe...
Florian Brandner, Tommy Thorn, Martin Schoeberl