High performance architectures have always had to deal with the performance-limiting impact of branch operations. Microprocessor designs are going to have to deal with this proble...
We have developed a robot controller based upon a neural implementation of Norman and Shallice's model of executive attentional control in humans. A simulation illustrates ho...
We describe a new intermediate compiler representation, static token form, that is suitable for dataflow-style synthesis of high-level asynchronous specifications. Static token fo...
Abstract. This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface that supports both irregular (via configu...
Expressing rules in controlled natural language can bring us closer to the vision of the Semantic Web since rules can be written in the notation of the application domain and are u...