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SPAA
2010
ACM
15 years 4 months ago
Buffer-space efficient and deadlock-free scheduling of stream applications on multi-core architectures
We present a scheduling algorithm of stream programs for multi-core architectures called team scheduling. Compared to previous multi-core stream scheduling algorithms, team schedu...
JongSoo Park, William J. Dally
CHI
2003
ACM
16 years 4 months ago
Simple cognitive modeling in a complex cognitive architecture
Cognitive modeling has evolved into a powerful tool for understanding and predicting user behavior. Higher-level modeling frameworks such as GOMS and its variants facilitate fast ...
Dario D. Salvucci, Frank J. Lee
176
Voted
DAC
1997
ACM
15 years 8 months ago
ISDL: An Instruction Set Description Language for Retargetability
Abstract—We present the Instruction Set Description Language, ISDL, a machine description language used to describe target architectures to a retargetable compiler. The features ...
George Hadjiyiannis, Silvina Hanono, Srinivas Deva...
MICRO
2010
IEEE
115views Hardware» more  MICRO 2010»
15 years 2 months ago
Per-Thread Cycle Accounting
This paper proposes a cycle accounting architecture for Simultaneous Multithreading (SMT) processors that estimates the execution times for each of the threads had they been execu...
Stijn Eyerman, Lieven Eeckhout
ICIP
2004
IEEE
16 years 5 months ago
An implemented architecture of deblocking filter for H.264/AVC
H.264/AVC is a new international standard for the compression of natural video images, in which a deblocking filter has been adopted to remove blocking artifacts. In this paper, w...
Bin Sheng, Wen Gao, Di Wu