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IEEEPACT
2003
IEEE
15 years 9 months ago
Picking Statistically Valid and Early Simulation Points
Modern architecture research relies heavily on detailed pipeline simulation. Simulating the full execution of an industry standard benchmark can take weeks to months to complete. ...
Erez Perelman, Greg Hamerly, Brad Calder
IEEEPACT
2000
IEEE
15 years 8 months ago
aSOC: A Scalable, Single-Chip Communications Architecture
As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with onchip system-leve...
Jian Liang, Sriram Swaminathan, Russell Tessier
132
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EUROPAR
2004
Springer
15 years 9 months ago
Architecture-Independent Meta-optimization by Aggressive Tail Splitting
Several optimization techniques are hindered by uncertainties about the control flow in a program, which can generally not be determined by static methods at compile time. We pres...
Michael Rock, Andreas Koch
IFIP
2000
Springer
15 years 7 months ago
Broadway: A Software Architecture for Scientific Computing
Scientific programs rely heavily on software libraries. This paper describes the limitations of this reliance and shows how it degrades software quality. We offer a solution that u...
Samuel Z. Guyer, Calvin Lin
FDL
2008
IEEE
15 years 5 months ago
RTL Generation of Channel Architecture Templates for a Template-based SoC Design Flow
In this paper, we propose the design methodology for communication channel templates from formal specification to RTL description. In this flow, design and verification start from...
Jinhyun Cho, Soonwoo Choi, Soo Chae