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» Execution Architectures and Compilation
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145
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HPCA
2002
IEEE
16 years 4 months ago
CableS: Thread Control and Memory Management Extensions for Shared Virtual Memory Clusters
Clusters of high-end workstations and PCs are currently used in many application domains to perform large-scale computations or as scalable servers for I/O bound tasks. Although c...
Peter Jamieson, Angelos Bilas
152
Voted
MICRO
2009
IEEE
315views Hardware» more  MICRO 2009»
15 years 10 months ago
Control flow obfuscation with information flow tracking
Recent micro-architectural research has proposed various schemes to enhance processors with additional tags to track various properties of a program. Such a technique, which is us...
Haibo Chen, Liwei Yuan, Xi Wu, Binyu Zang, Bo Huan...
126
Voted
ACSAC
2006
IEEE
15 years 10 months ago
Address Space Layout Permutation (ASLP): Towards Fine-Grained Randomization of Commodity Software
Address space randomization is an emerging and promising method for stopping a broad range of memory corruption attacks. By randomly shifting critical memory regions at process in...
Chongkyung Kil, Jinsuk Jun, Christopher Bookholt, ...
148
Voted
RTAS
2005
IEEE
15 years 9 months ago
Bounding Worst-Case Data Cache Behavior by Analytically Deriving Cache Reference Patterns
While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...
Harini Ramaprasad, Frank Mueller
CGO
2003
IEEE
15 years 9 months ago
Phi-Predication for Light-Weight If-Conversion
Predicated execution can eliminate hard to predict branches and help to enable instruction level parallelism. Many current predication variants exist where the result update is co...
Weihaw Chuang, Brad Calder, Jeanne Ferrante