3893 search results - page 212 / 779 » Execution Architectures and Compilation |
187
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VLSID
2007
IEEE
16 years 4 months ago
2007
IEEE
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
132
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IEEEPACT
2006
IEEE
15 years 10 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
140
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CF
2010
ACM
15 years 9 months ago
2010
ACM
Tuning applications for multi-core systems involve subtle concepts and target-dependent optimizations. New languages are being designed to express concurrency and locality without...
153
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ERSHOV
2009
Springer
15 years 10 months ago
2009
Springer
Abstract. Debugging virtual machines (VMs) presents unique challenges, especially meta-circular VMs, which are written in the same language they implement. Making sense of runtime ...
185
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EUROPAR
2009
Springer
15 years 7 months ago
2009
Springer
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...