3893 search results - page 222 / 779 » Execution Architectures and Compilation |
131
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IJCAI
2001
15 years 6 months ago
2001
The majority of existing language generation systems have a pipeline architecture which offers efficient sequential execution of modules, but does not allow decisions about text c...
ICMCS
2006
IEEE
15 years 11 months ago
2006
IEEE
This paper proposes a new architecture for efficient variable-length decoding (VLD) of entropy-coded data for multimedia applications on general-purpose processors. It improves o...
150
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SBACPAD
2007
IEEE
15 years 11 months ago
2007
IEEE
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
144
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DATE
2006
IEEE
2006
IEEE
Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys)
15 years 11 months ago
In this paper we analyze a 3D image rendering algorithm and the different mapping schemes to implement it in a SIMD reconfigurable architecture. 3D image render is highly computat...
141
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ICRA
1998
IEEE
15 years 9 months ago
1998
IEEE
This paper describes a multi-loop, modular navigation architecture for mobile robots whose structure allows the execution of most types of navigation tasks in a highly robust mann...