3893 search results - page 224 / 779 » Execution Architectures and Compilation |
163
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IPPS
2005
IEEE
15 years 11 months ago
2005
IEEE
This paper presents a hardware architecture for Multi Protocol Label Switching (MPLS). MPLS is a protocol used primarily to prioritize internet traffic and improve bandwidth utili...
138
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NPC
2005
Springer
15 years 10 months ago
2005
Springer
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
156
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DATE
2002
IEEE
15 years 10 months ago
2002
IEEE
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
141
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MA
1997
Springer
15 years 9 months ago
1997
Springer
: We describe a platform for the portable and secure execution of mobile agents written in various interpreted languages on top of a common run-time core. Agents may migrate at any...
156
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HICSS
1995
IEEE
15 years 8 months ago
1995
IEEE
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...