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CGO
2008
IEEE
15 years 4 months ago
Compiling for vector-thread architectures
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
Mark Hampton, Krste Asanovic
ARCS
1997
Springer
15 years 1 months ago
Compiler Technology for Two Novel Computer Architectures
Before it can achieve wide acceptance, parallelcomputation must be made significantlyeasier to program. One ain obstacles to this goal is the current usage of memory, both abstra...
Ronald Moore, Bernd Klauer, Klaus Waldschmidt
ASPLOS
2010
ACM
15 years 4 months ago
MacroSS: macro-SIMDization of streaming applications
SIMD (Single Instruction, Multiple Data) engines are an essential part of the processors in various computing markets, from servers to the embedded domain. Although SIMD-enabled a...
Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Ku...
ECRTS
1998
IEEE
15 years 2 months ago
Facilitating worst-case execution times analysis for optimized code
In this paper we present co-transformation, a novel approach to the mapping of execution information from the source code of a program to the object code for the purpose of worst-...
Jakob Engblom, Andreas Ermedahl, Peter Altenbernd
SC
2004
ACM
15 years 3 months ago
Language and Compiler Support for Adaptive Applications
There exist many application classes for which the users have significant flexibility in the quality of output they desire. At the same time, there are other constraints, such a...
Wei Du, Gagan Agrawal