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    CASES
    2005
    ACM
    129views System Software» more  CASES 2005»
    Compilation techniques for energy reduction in horizontally partitioned cache architectures
    14 years 11 months ago
    Compilation techniques for energy reduction in horizontally partitioned cache architectures
    Download  www.cecs.uci.edu
    Horizontally partitioned data caches are a popular architectural feature in which the processor maintains two or more data caches at the same level of hierarchy. Horizontally part...
    Aviral Shrivastava, Ilya Issenin, Nikil Dutt
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    HIPEAC
    2009
    Springer
    109views System Software» more  HIPEAC 2009»
    Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures
    15 years 4 months ago
    Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures
    Download  lca.ece.utexas.edu
    Muhammad Umar Farooq, Lizy Kurian John, Margarida ...
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    ASPDAC
    2009
    ACM
    91views Hardware» more  ASPDAC 2009»
    Thermal-aware post compilation for VLIW architectures
    15 years 4 months ago
    Thermal-aware post compilation for VLIW architectures
    Download  www.aspdac.com
    Wen-Wen Hsieh, TingTing Hwang
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    CASES
    2006
    ACM
    132views System Software» more  CASES 2006»
    Compiler optimization of embedded applications for an adaptive SoC architecture
    15 years 3 months ago
    Compiler optimization of embedded applications for an adaptive SoC architecture
    Download  www.cecs.uci.edu
    Charles Hardnett, Krishna V. Palem, Yogesh Chobe
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    SAMOS
    2005
    Springer
    81views Embedded Systems» more  SAMOS 2005»
    Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures
    15 years 3 months ago
    Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures
    Download  webhome.cs.uvic.ca
    Stefan Farfeleder, Andreas Krall, R. Nigel Horspoo...
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