A need exists to develop groupware systems that adapt to available resources and support user mobility. This paper presents DACIA, a system that provides mechanisms for building s...
Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
This paper describes an algebra for use with parallel object databases, and in particular ODMG compliant databases with OQL. Although there have been many proposals for parallel r...
Sandra de F. Mendes Sampaio, Norman W. Paton, Paul...
We propose an hardware solution to several security problems that are difficult to solve on classical processor architectures, like licensing, electronic commerce, or software pri...
Previous simulators for shared-memory architectures have imposed a large tradeoff between simulation accuracy and speed. Most such simulators model simple processors that do not e...