3893 search results - page 655 / 779 » Execution Architectures and Compilation |
143
Voted
CODES
2006
IEEE
15 years 9 months ago
2006
IEEE
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
128
Voted
IJCNN
2006
IEEE
15 years 9 months ago
2006
IEEE
— This work presents a new architecture of artificial neural networks – Venn Networks, which produce localized activations in a 2D map while executing simple cognitive tasks. T...
127
Voted
PADS
2006
ACM
15 years 9 months ago
2006
ACM
The High Level Architecture (HLA) is a standard for the interoperability and reuse of simulation components, referred to as federates. Large scale HLA-compliant simulations are bu...
130
Voted
RTAS
2005
IEEE
15 years 9 months ago
2005
IEEE
Low-end embedded architectures, such as sensor nodes, have become popular in diverse fields, many of which impose real-time constraints. Currently, the Atmel Atmega processor fam...
131
Voted
SAC
2005
ACM
15 years 9 months ago
2005
ACM
The server side of business software systems is commonly implemented today by an ensemble of Java classes distributed over several hosts. In this scenario, it is often necessary, ...