3893 search results - page 72 / 779 » Execution Architectures and Compilation |
MICRO
1991
IEEE
15 years 1 months ago
1991
IEEE
- We present techniques for exploiting parallelism extracted from loops on an MIMD system. Parallelism is exploited through parallel execution of instructions on multiple processor...
CODES
2006
IEEE
14 years 11 months ago
2006
IEEE
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
IEEEPACT
2007
IEEE
15 years 4 months ago
2007
IEEE
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...
SAMOS
2004
Springer
15 years 3 months ago
2004
Springer
Today’s Application Specific Instruction-set Processor (ASIP) design methodology often employs centralized Architecture Description Language (ADL) processor models, from which s...
RTAS
2008
IEEE
15 years 4 months ago
2008
IEEE
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...