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ICS
1994
Tsinghua U.
15 years 2 months ago
Evaluating automatic parallelization for efficient execution on shared-memory multiprocessors
We present a parallel code generation algorithm for complete applications and a new experimental methodology that tests the efficacy of our approach. The algorithm optimizes for d...
Kathryn S. McKinley
ICCD
1993
IEEE
111views Hardware» more  ICCD 1993»
15 years 2 months ago
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
Michael A. Riepe, João P. Marques Silva, Ka...
HOTOS
2009
IEEE
15 years 1 months ago
FLUXO: A Simple Service Compiler
In this paper, we propose FLUXO, a system that separates an Internet service's logical functionality from the architectural decisions made to support performance, scalability...
Emre Kiciman, V. Benjamin Livshits, Madanlal Musuv...
DAC
1995
ACM
15 years 1 months ago
A General Method for Compiling Event-Driven Simulations
Abstract—We present a new approach to event-driven simulation that does not use a centralized run-time event queue, yet is capable of handling arbitrary models, including those w...
Robert S. French, Monica S. Lam, Jeremy R. Levitt,...
IPPS
2010
IEEE
14 years 7 months ago
Ensuring deterministic concurrency through compilation
Abstract--Multicore shared-memory architectures are becoming prevalent but bring many programming challenges. Among the biggest is non-determinism: the output of the program does n...
Nalini Vasudevan, Stephen A. Edwards