3893 search results - page 99 / 779 » Execution Architectures and Compilation |
145
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ICS
1994
Tsinghua U.
15 years 8 months ago
1994
Tsinghua U.
We present a parallel code generation algorithm for complete applications and a new experimental methodology that tests the efficacy of our approach. The algorithm optimizes for d...
119
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ICCD
1993
IEEE
15 years 8 months ago
1993
IEEE
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
132
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HOTOS
2009
IEEE
15 years 7 months ago
2009
IEEE
In this paper, we propose FLUXO, a system that separates an Internet service's logical functionality from the architectural decisions made to support performance, scalability...
113
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DAC
1995
ACM
15 years 7 months ago
1995
ACM
Abstract—We present a new approach to event-driven simulation that does not use a centralized run-time event queue, yet is capable of handling arbitrary models, including those w...
IPPS
2010
IEEE
15 years 1 months ago
2010
IEEE
Abstract--Multicore shared-memory architectures are becoming prevalent but bring many programming challenges. Among the biggest is non-determinism: the output of the program does n...