453 search results - page 68 / 91 » Execution and Cache Performance of the Scheduled Dataflow Ar... |
IEEEPACT
2000
IEEE
15 years 1 months ago
2000
IEEE
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
PPOPP
1993
ACM
15 years 1 months ago
1993
ACM
This paper discusses some of the issues involved in implementing a shared-address space programming model on large-scale, distributed-memory multiprocessors. While such a programm...
ISCA
2010
IEEE
15 years 2 months ago
2010
IEEE
Aggressive technology scaling into the nanometer regime has led to a host of reliability challenges in the last several years. Unlike onchip caches, which can be efficiently prot...
CLUSTER
2004
IEEE
15 years 1 months ago
2004
IEEE
Cluster computing environments built from commodity hardware have provided a cost-effective solution for many scientific and high-performance applications. Likewise, middleware te...
104
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CLUSTER
2010
IEEE
14 years 1 months ago
2010
IEEE
Many-task computing aims to bridge the gap between two computing paradigms, high throughput computing and high performance computing. Many-task computing denotes highperformance co...