929 search results - page 103 / 186 » Execution architectures for program algebra |
116
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IISWC
2008
IEEE
15 years 9 months ago
2008
IEEE
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
132
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ISPASS
2010
IEEE
15 years 10 months ago
2010
IEEE
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
128
Voted
MICRO
2008
IEEE
15 years 9 months ago
2008
IEEE
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
149
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SC
2009
ACM
15 years 10 months ago
2009
ACM
MapReduce provides a parallel and scalable programming model for data-intensive business and scientific applications. MapReduce and its de facto open source project, called Hadoop...
126
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DATE
2009
IEEE
15 years 10 months ago
2009
IEEE
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...