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» Execution architectures for program algebra
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CGO
2003
IEEE
15 years 5 months ago
Dynamic Binary Translation for Accumulator-Oriented Architectures
A dynamic binary translation system for a co-designed virtual machine is described and evaluated. The underlying hardware directly executes an accumulator-oriented instruction set...
Ho-Seop Kim, James E. Smith
MICRO
2010
IEEE
172views Hardware» more  MICRO 2010»
14 years 9 months ago
Architectural Support for Fair Reader-Writer Locking
Abstract--Many shared-memory parallel systems use lockbased synchronization mechanisms to provide mutual exclusion or reader-writer access to memory locations. Software locks are i...
Enrique Vallejo, Ramón Beivide, Adriá...
HIPC
2009
Springer
14 years 9 months ago
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Ga...
CASES
2009
ACM
15 years 6 months ago
Tight WCRT analysis of synchronous C programs
Accurate estimation of the tick length of a synchronous program is essential for efficient and predictable implementations that are devoid of timing faults. The techniques to dete...
Partha S. Roop, Sidharta Andalam, Reinhard von Han...
PDPTA
2003
15 years 1 months ago
An Interactive Tuning Support for Processor Allocation of Data-Driven Realtime Programs
This paper presents the effectiveness of an interactive support facility to tune processor allocation of data-driven realtime programs on CUE (Coordinating Users’ requirements an...
Yasuhiro Wabiko, Hiroaki Nishikawa