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» Execution architectures for program algebra
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DSD
2010
IEEE
137views Hardware» more  DSD 2010»
14 years 10 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
IPPS
2010
IEEE
14 years 9 months ago
Performance evaluation of concurrent collections on high-performance multicore computing systems
This paper is the first extensive performance study of a recently proposed parallel programming model, called Concurrent Collections (CnC). In CnC, the programmer expresses her co...
Aparna Chandramowlishwaran, Kathleen Knobe, Richar...
PLDI
1995
ACM
15 years 3 months ago
Unifying Data and Control Transformations for Distributed Shared Memory Machines
We present a unified approach to locality optimization that employs both data and control transformations. Data transformations include changing the array layout in memory. Contr...
Michal Cierniak, Wei Li
DEDS
2000
83views more  DEDS 2000»
14 years 11 months ago
Synthesis of Discrete-Event Controllers Based on the Signal Environment
In this paper, we present the integration of controller synthesis techniques in the SIGNAL environment through the description of a tool dedicated to the incremental construction o...
Hervé Marchand, Patricia Bournai, Michel Le...
IEEEINTERACT
2003
IEEE
15 years 5 months ago
Procedure Cloning and Integration for Converting Parallelism from Coarse to Fine Grain
This paper introduces a method for improving program run-time performance by gathering work in an application and executing it efficiently in an integrated thread. Our methods ext...
Won So, Alexander G. Dean