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» Execution architectures for program algebra
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ISCA
2007
IEEE
208views Hardware» more  ISCA 2007»
15 years 6 months ago
Core fusion: accommodating software diversity in chip multiprocessors
This paper presents core fusion, a reconfigurable chip multiprocessor (CMP) architecture where groups of fundamentally independent cores can dynamically morph into a larger CPU, ...
Engin Ipek, Meyrem Kirman, Nevin Kirman, Jos&eacut...
FPL
2004
Springer
106views Hardware» more  FPL 2004»
15 years 5 months ago
FiPRe: An Implementation Model to Enable Self-Reconfigurable Applications
ASIPs and reconfigurable processors are architectural choices to extend the capabilities of a given processor. ASIPs suffer from fixed hardware after design, while ASIPs and reconf...
Leandro Möller, Ney Laert Vilar Calazans, Fer...
FPL
2003
Springer
95views Hardware» more  FPL 2003»
15 years 5 months ago
Reconfigurable Hardware SAT Solvers: A Survey of Systems
By adapting to computations that are not so well supported by general-purpose processors, reconfigurable systems achieve significant increases in performance. Such computational sy...
Iouliia Skliarova, António de Brito Ferrari
MICRO
2000
IEEE
137views Hardware» more  MICRO 2000»
15 years 4 months ago
Relational profiling: enabling thread-level parallelism in virtual machines
Virtual machine service threads can perform many tasks in parallel with program execution such as garbage collection, dynamic compilation, and profile collection and analysis. Har...
Timothy H. Heil, James E. Smith
EUROMICRO
1999
IEEE
15 years 4 months ago
Enhancing Security in the Memory Management Unit
We propose an hardware solution to several security problems that are difficult to solve on classical processor architectures, like licensing, electronic commerce, or software pri...
Tanguy Gilmont, Jean-Didier Legat, Jean-Jacques Qu...