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» Execution architectures for program algebra
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DAC
2000
ACM
16 years 24 days ago
Function-level power estimation methodology for microprocessors
We have developed a function-level power estimation methodology for predicting the power dissipation of embedded software. For a given microprocessor core, we empirically build th...
Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag ...
SC
2004
ACM
15 years 5 months ago
RPC-V: Toward Fault-Tolerant RPC for Internet Connected Desktop Grids with Volatile Nodes
RPC is one of the programming models envisioned for the Grid. In Internet connected Large Scale Grids such as Desktop Grids, nodes and networks failures are not rare events. This ...
Samir Djilali, Thomas Hérault, Oleg Lodygen...
COORDINATION
2008
Springer
15 years 1 months ago
Formalizing Higher-Order Mobile Embedded Business Processes with Binding Bigraphs
Abstract. We propose and formalize HomeBPEL, a higher-order WSBPEL-like business process execution language where processes are firstclass values that can be stored in variables, p...
Mikkel Bundgaard, Arne J. Glenstrup, Thomas T. Hil...
PLDI
2011
ACM
14 years 2 months ago
Understanding POWER multiprocessors
Exploiting today’s multiprocessors requires highperformance and correct concurrent systems code (optimising compilers, language runtimes, OS kernels, etc.), which in turn requir...
Susmit Sarkar, Peter Sewell, Jade Alglave, Luc Mar...
ICCD
2008
IEEE
221views Hardware» more  ICCD 2008»
15 years 8 months ago
Reversi: Post-silicon validation system for modern microprocessors
— Verification remains an integral and crucial phase of today’s microprocessor design and manufacturing process. Unfortunately, with soaring design complexities and decreasing...
Ilya Wagner, Valeria Bertacco