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ASPLOS
2012
ACM
13 years 7 months ago
Reflex: using low-power processors in smartphones without knowing them
To accomplish frequent, simple tasks with high efficiency, it is necessary to leverage low-power, microcontroller-like processors that are increasingly available on mobile systems...
Felix Xiaozhu Lin, Zhen Wang, Robert LiKamWa, Lin ...
SIGMOD
2012
ACM
234views Database» more  SIGMOD 2012»
13 years 2 months ago
Oracle in-database hadoop: when mapreduce meets RDBMS
Big data is the tar sands of the data world: vast reserves of raw gritty data whose valuable information content can only be extracted at great cost. MapReduce is a popular parall...
Xueyuan Su, Garret Swart
OOPSLA
2009
Springer
15 years 6 months ago
Thorn: robust, concurrent, extensible scripting on the JVM
Scripting languages enjoy great popularity due their support for rapid and exploratory development. They typically have lightweight syntax, weak data privacy, dynamic typing, powe...
Bard Bloom, John Field, Nathaniel Nystrom, Johan &...
MM
2009
ACM
217views Multimedia» more  MM 2009»
15 years 6 months ago
Streaming HD H.264 encoder on programmable processors
Programmable processors have great advantage over dedicated ASIC design under intense time-to-market pressure. However, realtime encoding of high-definition (HD) H.264 video (up t...
Nan Wu, Mei Wen, Wei Wu, Ju Ren, Huayou Su, Changq...
DATE
2003
IEEE
97views Hardware» more  DATE 2003»
15 years 5 months ago
Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
G. Surendra, Subhasis Banerjee, S. K. Nandy