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MICRO
1999
IEEE
102views Hardware» more  MICRO 1999»
15 years 4 months ago
Evaluation of a High Performance Code Compression Method
Compressing the instructions of an embedded program is important for cost-sensitive low-power control-oriented embedded computing. A number of compression schemes have been propos...
Charles Lefurgy, Eva Piccininni, Trevor N. Mudge
FPGA
1999
ACM
142views FPGA» more  FPGA 1999»
15 years 4 months ago
Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
Abdel Ejnioui, N. Ranganathan
PACS
2000
Springer
99views Hardware» more  PACS 2000»
15 years 3 months ago
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
Power dissipation is a major concern not only for portable systems, but also for high-performance systems. In the past, energy consumption and processor heating was reduced mainly...
Roberto Maro, Yu Bai, R. Iris Bahar
ASPLOS
2008
ACM
15 years 1 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
DAC
2009
ACM
16 years 24 days ago
WCET-aware register allocation based on graph coloring
Current compilers lack precise timing models guiding their built-in optimizations. Hence, compilers apply ad-hoc heuristics during optimization to improve code quality. One of the...
Heiko Falk